Spiking Neural Networks with Unsupervised Learning Based on STDP Using Resistive Synaptic Devices and Analog CMOS...

Area of Science:

• Neuroscience
• Materials Science
• Electrical Engineering

Background:

• Spiking neural networks (SNNs) offer a promising, energy-efficient computing paradigm.
• Developing hardware for SNNs requires integrated neuron and synaptic components.
• Resistive switching devices show potential for neuromorphic applications due to their analog behavior.

Purpose of the Study:

• To design and fabricate a CMOS analog integrate-and-fire (I&F) neuron circuit capable of driving resistive synaptic devices.
• To develop an unsupervised SNN for pattern recognition and classification using the integrated circuit and devices.
• To demonstrate autonomous, hardware-based synaptic weight updates via a spike-timing-dependent plasticity (STDP) learning rule.

Main Methods:

• Designed a CMOS analog I&F neuron circuit with components for spatial/temporal integration and pulse generation.
• Fabricated resistive synaptic devices using a HfOx switching layer via atomic layer deposition (ALD).
• Performed circuit simulations and developed an unsupervised SNN for 5x5 pattern recognition.

Main Results:

• The CMOS neuron circuit successfully drove the fabricated resistive synaptic devices.
• Resistive synaptic devices exhibited gradual set/reset characteristics, enabling conductance modulation via STDP.
• The developed unsupervised SNN demonstrated effective 5x5 pattern recognition and classification.
• Hardware-based SNN achieved autonomous synaptic weight updates without software assistance.

Conclusions:

• The integrated CMOS neuron and resistive synaptic devices form a viable hardware platform for SNNs.
• This approach enables efficient, autonomous learning and synaptic plasticity in neuromorphic systems.
• The developed system offers a pathway towards energy-efficient, brain-inspired computing for pattern recognition tasks.