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In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

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Electrical Coupling and Simulation of Monolithic 3D Logic Circuits and Static Random Access Memory.

Tae Jun Ahn^1,2, Bum Ho Choi³, Sung Kyu Lim⁴

¹Department of Electrical, Electronic and Control Engineering and IITC, Hankyong National University, 327 Jungang-ro, Anseong-si, Gyenggi-do 17579, Korea. jigo1235@hknu.ac.kr.

|September 25, 2019

Summary

Researchers investigated additional electrical coupling in monolithic 3D NAND (M3DNAND) structures. They confirmed it is blocked by heavily doped regions, enabling accurate circuit simulations of M3DNAND, M3DNOR, multiplexers, and memory cells.

Keywords:

circuit simulation electrical coupling monolithic 3D integrated circuit (IC)parameter extraction

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Area of Science:

Semiconductor device physics
Integrated circuit design
Computational electronics

Background:

Previous research proposed HSPICE models considering electrical coupling in monolithic 3D NAND (M3DNAND) structures.
Understanding parasitic electrical coupling is crucial for accurate circuit simulation and performance prediction in advanced 3D integrated circuits.

Purpose of the Study:

To investigate the existence and impact of additional electrical coupling beyond top and bottom layers in M3DNAND structures.
To validate the M3DNAND unit cell model for simulating various logic circuits and full chip designs.

Main Methods:

Device simulation was employed to verify the presence of additional electrical coupling.
Technology Computer-Aided Design (TCAD) mixed-mode simulations were used to compare HSPICE circuit simulation results with device-level behavior.
The previously proposed monolithic 3D inverter (M3DINV) unit cell model was utilized.

Main Results:

Additional electrical coupling was identified and confirmed to be effectively blocked by heavily doped source/drain regions.
HSPICE circuit simulation results using the M3DNAND unit cell model were verified against TCAD mixed-mode simulations.
The M3DINV unit cell model demonstrated its capability for simulating diverse logic circuits.

Conclusions:

The M3DNAND unit cell model accurately simulates circuit operations, including M3DNAND, M3DNOR, multiplexers, D-flip-flops, and SRAM.
The blocking of additional electrical coupling by heavily doped regions simplifies circuit design and simulation.
This validated model facilitates the simulation of complex logic circuits and full chip designs based on the M3DNAND architecture.