High-Efficiency Silicon Inverted Pyramid-Based Passivated Emitter and Rear Cells

Area of Science:

• Materials Science
• Renewable Energy
• Semiconductor Physics

Background:

• Surface texturing is crucial for enhancing photovoltaic (PV) device performance.
• Inverted pyramid (IP) textures offer superior antireflection and structural benefits for PV devices.

Purpose of the Study:

• To fabricate high-uniform silicon inverted pyramid (IP) structures on commercial monocrystalline silicon wafers.
• To develop a novel silicon IP-based passivated emitter and rear cell (PERC) by combining front IP textures with rear surface passivation.
• To achieve high efficiency in Si IP-based PERC devices.

Main Methods:

• Metal-assisted chemical etching (MACE) and alkali anisotropic etching were employed to create Si IP structures.
• Fabrication involved combining front IP textures with Al2O3/SiNx rear surface passivation.
• Stack SiO2/SiNx passivation was used for the Si IP-based n+ emitter.

Main Results:

• A high efficiency of 21.4% was achieved for the Si IP-based PERC, comparable to commercial PERC solar cells.
• Optimized IP texture morphology improved the short-circuit current (Isc) from 9.51 A to 9.63 A.
• High open-circuit voltage (Voc) of 0.677 V was obtained due to effective emitter and rear surface passivation.

Conclusions:

• The developed Si IP-based PERC demonstrates competitive texturing techniques for high-performance PV devices.
• The study highlights the promising prospect of this method for mass production of Si IP-based PERC solar cells.
• Optimized IP texturing and advanced passivation strategies are key to achieving high solar cell efficiencies.