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A Low-Resources TDC for Multi-Channel Direct ToF Readout Based on a 28-nm FPGA.

Mojtaba Parsakordasiabi1, Ion Vornicu1, Ángel Rodríguez-Vázquez1

  • 1Instituto de Microelectrónica de Sevilla, IMSE-CNM (CSIC-Universidad de Sevilla), Avda. Américo Vespucio s/n, Parque Científico y Tecnológico de La Cartuja, 41092 Seville, Spain.

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Summary
This summary is machine-generated.

This study introduces a novel Field Programmable Gate Array (FPGA)-based Time-to-Digital Converter (TDC) architecture for high-performance, resource-efficient multi-channel Time-of-Flight (ToF) applications.

Keywords:
field programmable gate array (FPGA)multichannel TDCssingle-photon avalanche diode (SPAD)tapped-delay-line (TDL)thermometer-to-binary (T2B) encodertime-of-flight (ToF)time-to-digital converter (TDC)

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Area of Science:

  • Digital electronics
  • Integrated circuit design
  • Embedded systems

Background:

  • Time-to-Digital Converters (TDCs) are crucial for precise timing measurements in various applications.
  • Existing TDC architectures often face challenges in balancing performance, resource utilization, and accuracy.
  • Direct Time-of-Flight (ToF) applications demand high-resolution and multi-channel capabilities.

Purpose of the Study:

  • To propose a novel FPGA-based TDC architecture.
  • To achieve high performance with reduced resource consumption.
  • To enable multi-channel direct ToF applications.

Main Methods:

  • Design of a synchronizing input stage.
  • Implementation of a tuned tapped delay line (TDL).
  • Utilization of combinatory encoders with ones and zeros counters.
  • Inclusion of an online calibration stage.

Main Results:

  • Experimental validation on an Artix-7 FPGA.
  • Differential Non-Linearity (DNL) achieved within [-0.953, 1.185] LSB.
  • Integral Non-Linearity (INL) achieved within [-2.750, 1.238] LSB.
  • Measured Least Significant Bit (LSB) size of 22.2 ps and precision of 26.04 ps.
  • Demonstrated low FPGA resource utilization.

Conclusions:

  • The proposed FPGA-based TDC architecture offers a high-performance solution.
  • The design achieves excellent linearity and precision with minimal resource overhead.
  • This architecture is well-suited for multi-channel direct ToF systems.