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A Scaling Law for SPAD Pixel Miniaturization.

Kazuhiro Morimoto1,2, Edoardo Charbon1

  • 1AQUA Laboratory, École Polytechnique Fédérale de Lausanne (EPFL), 2000 Neuchâtel, Switzerland.

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Researchers analyzed scaling laws for miniaturized single-photon avalanche diode (SPAD) arrays. Pixel size reduction improves dark count rate and power consumption but degrades fill factor and photon detection probability.

Keywords:
pixel miniaturizationscaling lawsingle-photon avalanche diode

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Area of Science:

  • Photonics and Semiconductor Devices
  • Integrated Circuits Design
  • Quantum Sensing Technologies

Background:

  • Growing demand for compact, high-definition single-photon avalanche diode (SPAD) arrays necessitates pixel miniaturization.
  • Sub-10 μm pixel sizes are a key target, but scaling impacts critical performance metrics.
  • Systematic analysis of tradeoffs in miniaturized SPADs is crucial for future development.

Purpose of the Study:

  • To analytically formulate scaling laws for key metrics in miniaturized SPADs.
  • To investigate the impact of pixel size reduction on fill factor, photon detection probability, dark count rate, correlated noise, and power consumption.
  • To provide a tool for comparing different SPAD configurations and advancing miniaturization.

Main Methods:

  • Developed an analytical formulation for SPAD scaling laws based on general layout geometry assumptions.
  • Performed numerical calculations for various parameter sets to evaluate metric trends.
  • Compared theoretical scaling trends with existing experimental data from SPAD devices.

Main Results:

  • Pixel miniaturization improves dark count rate (DCR) and power consumption.
  • Pixel miniaturization degrades fill factor (FF) and photon detection probability (PDP).
  • Theoretical scaling law predictions show good agreement with experimental SPAD results.

Conclusions:

  • Analytical scaling law analysis provides a valuable framework for understanding miniaturized SPAD performance tradeoffs.
  • This analysis aids in comparing diverse process, device, and layout configurations.
  • The findings are essential for advancing SPAD pixel miniaturization towards sub-2 μm pitch devices.