Energy-Efficient III-V Tunnel FET-Based Synaptic Device with Enhanced Charge Trapping Ability Utilizing Both Hot Hole...

Area of Science:

• Materials Science
• Electronics Engineering
• Artificial Intelligence

Background:

• Field-effect transistors (FETs) are promising for artificial synapses due to reliability and fabrication maturity.
• Conventional MOSFET-based synapses suffer from slow operation and high power consumption due to inefficient charge injection.

Purpose of the Study:

• To develop a highly efficient charge trap synapse using III-V materials-based tunnel field-effect transistors (TFETs).
• To enhance synaptic update speed and reduce energy consumption compared to existing technologies.

Main Methods:

• Utilized III-V materials-based TFETs for charge trap synapse fabrication.
• Leveraged hot holes from impact ionization and band-to-band tunneling hot electrons (BBHEs) for improved charge trapping.
• Conducted artificial neural network (ANN) simulations to evaluate performance.

Main Results:

• Achieved a 5750x faster synaptic update speed compared to MOSFET-based synapses.
• Demonstrated a 51x lower energy consumption per synaptic update (sub-fJ/µm²).
• Attained high recognition accuracy of ~90% for handwritten digits in an ANN simulation.

Conclusions:

• The proposed TFET-based charge trap synapse offers superior efficiency for artificial synaptic applications.
• This technology holds potential for advancing energy-efficient neuromorphic computing systems.
• The device's performance validates its suitability for complex AI tasks like digit recognition.