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Large Scale Energy Efficient Sensor Network Routing Using a Quantum Processor Unit
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A Monolithic Stochastic Computing Architecture for Energy Efficient Arithmetic.

Harikrishnan Ravichandran1, Yikai Zheng1, Thomas F Schranghamer1

  • 1Engineering Science and Mechanics, Penn State University, University Park, PA, 16802, USA.

Advanced Materials (Deerfield Beach, Fla.)
|October 29, 2022
PubMed
Summary
This summary is machine-generated.

Stochastic computing (SC) offers an energy-efficient alternative to traditional AI hardware. A novel 2D memtransistor-based architecture enables standalone SC, reducing energy consumption for stochastic bit generation and arithmetic operations.

Keywords:
2D materialsarithmeticmemtransistorsstochastic computing

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Area of Science:

  • Materials Science
  • Computer Engineering
  • Artificial Intelligence Hardware

Background:

  • Conventional high-precision digital computing demands escalating energy and hardware resources, particularly for AI applications.
  • Stochastic computing (SC) presents a paradigm shift, trading precision for energy and resource efficiency by simplifying arithmetic operations.
  • Existing SC acceleration methods using CMOS or hybrid memristor/spin-based designs face limitations in hardware investment, area, and energy efficiency.

Purpose of the Study:

  • To overcome the limitations of current and emerging technologies for stochastic computing.
  • To demonstrate a standalone, memory-embedded SC architecture.
  • To highlight the energy and resource efficiency benefits of SC.

Main Methods:

  • Experimental demonstration of a monolithic, non-von-Neumann SC architecture.
  • Integration of SC functionality within memory using 2D memtransistors.
  • Evaluation of energy consumption for s-bit generation and arithmetic operations.

Main Results:

  • Successful experimental demonstration of a standalone SC architecture.
  • Achieved a small hardware footprint and miniscule energy consumption (<1 nJ) for both s-bit generation and arithmetic operations.
  • Validated the benefits of SC through the novel memtransistor-based design.

Conclusions:

  • The developed 2D memtransistor-based SC architecture offers a highly efficient and compact solution for computing.
  • This monolithic, in-memory approach overcomes the hardware and energy burdens associated with conventional and hybrid SC systems.
  • The findings pave the way for more sustainable and resource-efficient computing, especially in the context of AI.