Steep-slope transistors enabled with 2D quantum coupling stacks.

Area of Science:

• Materials Science
• Semiconductor Physics
• Nanotechnology

Background:

• Transistor scaling faces limitations due to the Boltzmann limit for subthreshold slope (SS).
• Steep-slope transistors with SS below the Boltzmann limit are crucial for continued device scaling and improved energy efficiency.

Purpose of the Study:

• To investigate the use of 2D quantum materials in gate stacks for fabricating steep-slope transistors.
• To theoretically and experimentally validate the effectiveness of incorporating materials like graphene into MoS2 transistors.

Main Methods:

• Fabrication of MoS2 transistors with an inserted graphene layer in the gate stack.
• Application of density functional theory (DFT) to simulate SS in devices with various 2D materials (graphene, germanene, 2D topological insulators).
• Experimental characterization of fabricated graphene/MoS2 transistors.

Main Results:

• Experimental fabrication of steep-slope MoS2 transistors with a subthreshold slope of 49.2 mV/decade.
• DFT simulations predicted a steep SS of 27.2 mV/decade for graphene/MoS2 devices.
• Simulations indicated an exceptionally steep SS of 8.6 mV/decade for WTe2/MoS2 devices.

Conclusions:

• Incorporating 2D quantum materials into gate-channel stacks is an effective strategy for achieving steep-slope transistors.
• The combination of specific 2D materials can significantly reduce the subthreshold slope, enabling further transistor scaling.
• This approach offers a pathway to extend transistor scaling while maintaining exceptional device performance.