FPGA-Based Implementation of Multidimensional Reconciliation Encoding in Quantum Key Distribution.

Area of Science:

• Quantum Information Science
• Computer Engineering
• Cryptography

Background:

• Quantum Key Distribution (QKD) systems require efficient reconciliation encoding for secure key generation.
• Existing reconciliation methods often lack adaptability to variable data throughput requirements.
• Field-Programmable Gate Arrays (FPGAs) offer potential for high-speed, hardware-accelerated cryptographic algorithms.

Purpose of the Study:

• To propose a novel multidimensional reconciliation encoding algorithm for QKD systems.
• To design an FPGA-based implementation enabling variable data throughput.
• To enhance the efficiency and speed of the reconciliation process.

Main Methods:

• Developed a multidimensional reconciliation encoding algorithm utilizing a circulatory structure for structural multiplexing.
• Implemented efficient calculation and storage of eight-dimensional matrices to conserve resources.
• Designed a simplified algorithm tailored for FPGA characteristics, omitting unnecessary matrix multiplication for syndrome calculation.
• Validated the algorithm's feasibility and performance on a Xilinx Virtex-7 FPGA.

Main Results:

• The FPGA implementation demonstrated a variable data throughput capability.
• The algorithm achieved efficient syndrome generation by optimizing matrix operations.
• Maximum simulated throughput reached 4.88 M symbols/s, indicating high-speed performance.
• The simplified algorithm showed adaptability to different data rates.

Conclusions:

• The proposed multidimensional reconciliation encoding algorithm is feasible and high-speed for QKD systems.
• FPGA implementation allows for adaptable data throughput, meeting diverse system needs.
• The optimized algorithm enhances processing speed and resource efficiency in QKD reconciliation.