Study on ESD Protection Circuit by TCAD Simulation and TLP Experiment.

Area of Science:

• Electrical Engineering
• Materials Science
• Semiconductor Physics

Background:

• Growing importance of anti-electrostatic discharge (ESD) characteristics in electronic systems.
• Necessity of on-chip ESD protection for integrated circuits to prevent failures.
• Limited understanding of ESD damage mechanisms in complex integrated circuits.

Purpose of the Study:

• To build and simulate a mixed TCAD model for an ESD protection circuit.
• To investigate the physical phenomena and damage mechanisms during ESD events.
• To validate the model's accuracy against experimental data.

Main Methods:

• Development of a mixed TCAD model including 3D STI diode and 3D multi-gate CMOS inverter models.
• TCAD modeling based on a 0.25 μm technology node.
• Transient electrothermal coupling simulation and negative transmission line pulse (TLP) injection experiments on a CD4069UBC chip.

Main Results:

• Simulation of electrical signals and electrothermal parameter distribution within the circuit.
• Explanation of physical phenomena and damage mechanisms during TLP injection.
• Consistent prediction of diode damage location and type compared to experimental results.

Conclusions:

• The developed mixed TCAD model accurately reflects ESD behavior.
• The model and analysis method are valuable for predicting ESD robustness.
• The study provides insights into ESD soft damage analysis for integrated circuits.