Dense, 11 V-Tolerant, Balanced Stimulator IC with Digital Time-Domain Calibration for 100 nA Error

Area of Science:

• Biomedical Engineering
• Integrated Circuit Design
• Neuroscience

Background:

• Safe neurostimulation requires precise charge balancing to prevent electrode-tissue interface damage.
• Existing methods often compromise integration and area efficiency.
• High-resolution neural prostheses necessitate compatibility with high-impedance microelectrode arrays.

Purpose of the Study:

• To present a multichannel neurostimulator with a novel digital time-domain calibration (DTDC) technique.
• To achieve maximal integration and safe neurostimulation through advanced charge balancing.
• To reduce circuit matching constraints and save channel area.

Main Methods:

• Digital Time-Domain Calibration (DTDC) adjusts biphasic stimulation pulses digitally.
• A one-time characterization of stimulator channels using an on-chip ADC is performed.
• A 16-channel neurostimulator was implemented in 65 nm CMOS technology.

Main Results:

• The DTDC technique successfully reduced DC error below 96 nA across all channels post-calibration.
• Achieved 10.4 V compliance, enabling compatibility with high-impedance microelectrode arrays.
• Implemented a 16-channel stimulator with a minimal area of 0.0141 mm²/channel.

Conclusions:

• DTDC offers a viable solution for safe and highly integrated neurostimulators.
• The implemented chip demonstrates superior output swing in a low-voltage process.
• This work advances the development of next-generation neural prostheses.