Related Experiment Video
Updated: Jun 29, 2025

Large Scale Energy Efficient Sensor Network Routing Using a Quantum Processor Unit
Published on: September 8, 2023
An Energy-Efficient ECG Processor With Ultra-Low-Parameter Multistage Neural Network and Optimized Power-of-Two
This study introduces an energy-efficient ECG processor for cardiac arrhythmia classification, achieving 98.59% accuracy with a novel two-stage neural network and optimized quantization. The design offers significant energy savings compared to prior work.
Area of Science:
- Biomedical Engineering
- Computer Engineering
- Artificial Intelligence
Background:
- Cardiac arrhythmias pose a significant health risk, necessitating accurate and efficient detection methods.
- Existing electrocardiogram (ECG) processing solutions often face challenges with energy efficiency and computational complexity.
- Algorithm-hardware co-design offers a promising approach to optimize specialized hardware for complex signal processing tasks.
Purpose of the Study:
- To develop an energy-efficient ECG processor for real-time cardiac arrhythmia classification.
- To design a lightweight, two-stage neural network architecture optimized for hardware implementation.
- To improve low-bit quantization accuracy and reduce computational overhead in ECG processing.
Main Methods:
- Algorithm-hardware co-design integrating pre-processing and neural network acceleration.
- A novel two-stage neural network: Discrete Wavelet Transform (DWT) + ultra-low-parameter Multilayer Perceptron (MLP), followed by group convolution and channel shuffle.
- Optimized Power-of-Two (OPOT) quantization and a multiplier-less processing element for efficient low-bit operations.
- Implementation on a 65nm CMOS process with reconfigurable processing elements and adapted memory blocks.
Main Results:
- Achieved 98.59% accuracy for 5-class cardiac arrhythmia classification on the MIT-BIH dataset using 4-bit weight precision.
- Demonstrated an energy consumption of 0.15 uJ per inference at 1V.
- Realized a 64% energy saving compared to state-of-the-art approaches.
- Successfully implemented a lightweight neural network architecture with hardware resource optimization.
Conclusions:
- The proposed energy-efficient ECG processor effectively classifies cardiac arrhythmias with high accuracy and reduced power consumption.
- The algorithm-hardware co-design approach and novel neural network architecture are key to achieving significant energy savings.
- The OPOT quantization and multiplier-less design contribute to efficient low-bit precision processing for wearable or implantable cardiac monitoring devices.
More Related Videos
06:34A Single-Channel and Non-Invasive Wearable Brain-Computer Interface for Industry and Healthcare
Published on: July 7, 2023
11:25Simultaneous Scalp Electroencephalography EEG, Electromyography EMG, and Whole-body Segmental Inertial Recording for Multi-modal Neural Decoding
Published on: July 26, 2013