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Updated: Jun 23, 2025

A Fabrication and Measurement Method for a Flexible Ferroelectric Element Based on Van Der Waals Heteroepitaxy
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Exploring Disturb Characteristics in 2D and 3D Ferroelectric NAND Memory Arrays for Next-Generation Memory

Ik-Jyae Kim1, Jiwoung Choi1, Jang-Sik Lee1

  • 1Department of Materials Science and Engineering, Pohang University of Science and Technology (POSTECH), Pohang 37673, Korea.

ACS Applied Materials & Interfaces
|June 20, 2024
PubMed
Summary
This summary is machine-generated.

Optimal pass voltage is key for reliable, disturb-free operation in 2D and 3D ferroelectric NAND arrays using hafnia-based transistors. This ensures negligible read disturb, paving the way for advanced NAND flash memory.

Keywords:
disturbanceferroelectric NANDferroelectric materialsferroelectric transistor arrayzirconium-doped hafnium oxides

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Semiconductor Devices

Background:

  • Ferroelectric transistors offer advantages over charge-trap flash memory for 3D NAND technology, including lower power consumption and faster speeds.
  • Array-scale reliability is critical for the adoption of ferroelectric transistors in next-generation 3D NAND applications.

Purpose of the Study:

  • To investigate the array-scale reliability of hafnia-based ferroelectric transistors for advanced 3D NAND.
  • To establish a disturb-free voltage scheme for reliable operation of ferroelectric transistors within a 3D NAND array.

Main Methods:

  • Focused on analyzing the impact of voltage schemes on ferroelectric transistor behavior in 2D and 3D array configurations.
  • Evaluated disturb-free conditions and read disturb phenomena under various voltage stresses.

Main Results:

  • Optimal pass voltage is crucial for achieving disturb-free operation in both 2D and 3D ferroelectric NAND arrays.
  • Read disturb is found to be negligible when an appropriate read voltage is applied, confirming operational reliability.

Conclusions:

  • Hafnia-based ferroelectric transistors demonstrate potential for reliable operation in 2D and 3D NAND flash memory.
  • The identified voltage scheme provides a practical strategy for enhancing the reliability of ferroelectric NAND technology for high-density applications.