Wafer-Scale Atomic Layer-Deposited TeO/Te Heterostructure P-Type Thin-Film Transistors

There is an increasing demand for p-type semiconductors with scalable growth, excellent device performance, and back-end-of-line (BEOL) compatibility. Recently, tellurium (Te) has emerged as a promising candidate due to its appealing electrical properties and potential low-temperature production. So far, nearly all of the scalable production and integration of Te with complementary metal oxide semiconductor (CMOS) technology have been based on physical vapor deposition. Here we demonstrate wafer-scale atomic layer-deposited (ALD) TeO/Te heterostructure thin-film transistors with high uniformity and integration compatibility. The wafer-scale uniformity of the film is evidenced by spatial Raman mappings and statistical electrical analysis. Furthermore, surface accumulation-induced good ohmic contact has been observed and explained by the unique band alignment of the charge neutrality level inside the Te valence band. These results demonstrate ALD TeO/Te as a promising p-type semiconductor for monolithic three-dimensional integration in BEOL CMOS applications incorporated with well-established n-type ALD oxide semiconductors.