Related Experiment Video
Updated: May 12, 2026

Fabrication and Testing of Microfluidic Optomechanical Oscillators
Published on: May 29, 2014
A Review on Micro-Watts All-Digital Frequency Synthesizers
Venkadasamy Navaneethan1,2, Boon Chiat Terence Teo1,3, Annamalai Arasu Muthukumaraswamy2
1School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798, Singapore.
This review explores low-power, highly integrated all-digital frequency synthesizers for Internet-of-Things (IoT) devices. It highlights advancements in CMOS technology and architectures like all-digital phase-locked loops (ADPLLs) for efficient power consumption.
Area of Science:
- Electrical Engineering
- Integrated Circuits
- Signal Processing
Background:
- The proliferation of Internet-of-Things (IoT) devices necessitates highly integrated and low-power electronic components.
- Traditional frequency synthesizers often face limitations in power consumption and integration density for IoT applications.
- Complementary Metal-Oxide-Semiconductor (CMOS) technology offers a robust platform for high-density signal processing, making it ideal for advanced synthesizer designs.
Purpose of the Study:
- To review recent advancements in highly integrated all-digital frequency synthesizers.
- To identify and analyze architectures suitable for low-power Internet-of-Things (IoT) applications.
- To establish low power consumption as a primary metric for evaluating CMOS-based all-digital frequency synthesizers.
Main Methods:
- Literature review of recent developments in all-digital frequency synthesizers.
- Focus on architectures implemented in CMOS fabrication technology.
- Categorization of synthesizers into divider-less low-power types: all-digital phase-locked loops (ADPLLs), all-digital frequency-locked loops (ADFLLs), and hybrid PLLs.
- Analysis of architectural innovations for ADPLLs, including Digital-to-Time Converter (DTC)-assisted Time-to-Digital Converter (TDC) and embedded TDC.
Main Results:
- CMOS technology enables high-density, robust signal processing crucial for all-digital phase-locked loops (ADPLLs).
- Divider-less low-power frequency synthesizers, including ADPLLs, ADFLLs, and hybrid PLLs, are key for IoT.
- Architectural improvements like DTC-assisted TDC and embedded TDC contribute to lower power consumption in ADPLLs.
Conclusions:
- Highly integrated all-digital frequency synthesizers in CMOS are essential for low-power IoT applications.
- The review identifies ADPLLs, ADFLLs, and hybrid PLLs as promising architectures.
- Ongoing architectural developments are critical for achieving the stringent low-power requirements of future IoT devices.
Related Concept Videos
Effective Value of a Periodic Waveform
The effective value of a periodic current represents the direct current (DC) that conveys the same average power to a resistor as the periodic current itself. This concept is crucial when assessing AC circuits. To determine the...
Clipper Circuit
The operation of a clipper circuit can be exemplified by analyzing a dual-clipper configuration setup that integrates two ideal diodes, each paired with a biasing...
Discrete-Time Fourier Series
For a discrete-time periodic signal x[n]...
Aliasing
If the sampling frequency is below the Nyquist rate, these replicas overlap, preventing the original signal...
Downsampling
The Fourier transform of the decimated sequence reveals a combination of scaled and shifted versions of the original spectrum. This...
Upsampling

