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Vertical Self-Rectifying Memristive Arrays for Page-Wise Parallel Logic and Arithmetic Processing.

Kunhee Son1, Jea Min Cho1, Dong Hoon Shin1

  • 1Department of Materials Science and Engineering and Inter-university Semiconductor Research Center, College of Engineering, Seoul National University, Seoul, 08826, Republic of Korea.

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Summary
This summary is machine-generated.

This study introduces a novel logic-in-memory (LIM) architecture using memristors for efficient computation within memory. The developed system demonstrates scalable, energy-efficient in-memory computing by performing arithmetic operations directly on data.

Keywords:
arithmetic logic unitlogic‐in‐memorymemristive logicself‐rectifying memristorvertical memristor

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Area of Science:

  • Computer Science
  • Materials Science
  • Electrical Engineering

Background:

  • Conventional von Neumann architectures face data transfer bottlenecks.
  • Memristor-based logic-in-memory (LIM) systems offer a promising solution by integrating computation within memory arrays.
  • Non-volatile switching and dense integration capabilities make memristors suitable for LIM.

Purpose of the Study:

  • To implement a page-wise LIM architecture using a 3D vertical resistive random-access memory (VRRAM) array.
  • To perform Boolean functions and arithmetic operations entirely within the memory array.
  • To demonstrate a scalable and energy-efficient in-memory computing solution.

Main Methods:

  • A 3D VRRAM array composed of self-rectifying Pt-Ta2O5-Al:HfO2-TiN memristors was utilized.
  • Two logic primitives, 1M and 2M logic, were employed for intra-page and inter-page operations.
  • A memristive arithmetic logic unit (mALU) was designed and implemented for arithmetic functions.

Main Results:

  • Core Boolean functions were executed entirely within the memory array via resistive state transitions.
  • A 2-bit full adder was implemented with a minimal footprint of three cells and completed in 12 steps.
  • Experimental demonstration of intra- and inter-page operations and complete mALU functionality with high reproducibility.

Conclusions:

  • The proposed page-wise LIM architecture significantly reduces spatiotemporal cost.
  • This architecture holds promise for scalable and energy-efficient in-memory computing.
  • Memristor-based LIM systems are a viable approach to overcome von Neumann bottlenecks.