Luis Alberto Morales-Rosales

6PUBLICATIONS
14CO-AUTHORS
Query processing and optimisationMolecular, biological, and multi-scale communicationsNatural language processingOptimisationSoftware architecture
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Publications (6)

|Jul 09, 2022
A SHA-256 Hybrid-Redundancy Hardware Architecture for Detecting and Correcting Errors.

Ignacio Algredo-Badillo, Miguel Morales-Sandoval, Alejandro Medina-Santiago

|Apr 23, 2022
An SHA-3 Hardware Architecture against Failures Based on Hamming Codes and Triple Modular Redundancy.

Alan Torres-Alvarado, Luis Alberto Morales-Rosales, Ignacio Algredo-Badillo

|Apr 12, 2022
Trade-Off Analysis of Hardware Architectures for Channel-Quality Classification Models.

Alan Torres-Alvarado, Luis Alberto Morales-Rosales, Ignacio Algredo-Badillo

|Nov 27, 2021
<i>RootLogChain</i>: Registering Log-Events in a Blockchain for Audit Issues from the Creation of the Root.

Juan Carlos López-Pimentel, Luis Alberto Morales-Rosales, Raúl Monroy

|Nov 13, 2021
CMOS Implementation of ANNs Based on Analog Optimization of N-Dimensional Objective Functions.

Alejandro Medina-Santiago, Carlos Arturo Hernández-Gracidas, Luis Alberto Morales-Rosales

|Aug 28, 2021
Hybrid Pipeline Hardware Architecture Based on Error Detection and Correction for AES.

Ignacio Algredo-Badillo, Kelsey A Ramírez-Gutiérrez, Luis Alberto Morales-Rosales

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Frequent Collaborators

5 joint publications

Luis Alberto Morales-Rosales

3 joint publications

Mariana Lobato-Baez

3 joint publications

Juan Carlos López-Pimentel

2 joint publications

Alejandro Medina-Santiago