Optimal and robust design method for two-chip out-of-plane microaccelerometers.

Sangmin Lee1, Hyoungho Ko, Byoungdoo Choi

  • 1Automation and Systems Research Institute (ASRI), Inter-university Semiconductor Research Center (ISRC), School of Electrical Engineering & Computer Sciences, Seoul National University, Seoul, Korea. sangmlee@snu.ac.kr

Summary

This study presents an optimal design for a two-chip microelectromechanical systems (MEMS) and complementary metal-oxide-semiconductor (CMOS) microaccelerometer. The robust design minimizes noise and fabrication variations for improved uniformity and performance.

Related Concept Videos