Copper pillar and memory characteristics using Al2O3 switching material for 3D architecture.

Area of Science:

• Materials Science
• Electrical Engineering
• Nanotechnology

Background:

• Three-dimensional (3D) architectures require advanced interconnect technologies like through-silicon-vias (TSVs).
• Developing cost-effective and efficient alternatives to TSVs is crucial for next-generation electronic devices.

Purpose of the Study:

• To propose and investigate a novel copper (Cu) pillar formation technique as a TSV replacement in 3D integrated circuits.
• To evaluate the performance and characteristics of a Cu/Al2O3/TiN based memory device.

Main Methods:

• Fabrication of Al/Cu/Al2O3/TiN structures for Cu pillar formation under external bias.
• Characterization of Cu pillar formation, current-carrying capability, and device endurance using electrical measurements.
• Analysis of material properties using atomic force microscopy (AFM) and transmission electron microscopy (TEM).

Main Results:

• Successful formation of Cu pillars in Al2O3 film at low voltage (<5 V) with high current (>70 mA) and tight distribution across >100 devices.
• Achieved robust read pulse endurance (>10^6 cycles) at specific read voltages, though failure occurred at more negative voltages due to pillar rupture.
• Demonstrated bipolar resistive switching behavior at 500 μA with ±1 V operation, >10^3 s data retention, and a resistance ratio >10.

Conclusions:

• The proposed Cu pillar method offers a simple, low-cost alternative to TSVs for 3D architectures.
• High-current operation facilitates Cu pillar formation, while low-current operation enables bipolar resistive switching memory.
• The Cu/Al2O3/TiN structure shows promise for future 3D integrated systems.