Jove
Visualize
Contact Us
JoVE
x logofacebook logolinkedin logoyoutube logo
ABOUT JoVE
OverviewLeadershipBlogJoVE Help Center
AUTHORS
Publishing ProcessEditorial BoardScope & PoliciesPeer ReviewFAQSubmit
LIBRARIANS
TestimonialsSubscriptionsAccessResourcesLibrary Advisory BoardFAQ
RESEARCH
JoVE JournalMethods CollectionsJoVE Encyclopedia of ExperimentsArchive
EDUCATION
JoVE CoreJoVE BusinessJoVE Science EducationJoVE Lab ManualFaculty Resource CenterFaculty Site
Terms & Conditions of Use
Privacy Policy
Policies

Related Concept Videos

Equivalent Resistance01:16

Equivalent Resistance

1.2K
In circuit analysis, situations often arise where resistors are neither in series nor parallel configurations. To tackle such scenarios, three-terminal equivalent networks like the wye (Y) (Figure 1 (a)) or tee (T) and delta (Δ) (Figure 1 (b)) or pi (π) networks come into play. These networks offer versatile solutions and are frequently encountered in various applications, including three-phase electrical systems, electrical filters, and matching networks.
1.2K
Norton's Theorem01:14

Norton's Theorem

1.8K
Norton's theorem is a fundamental principle stating that a linear two-terminal circuit can be substituted with an equivalent circuit, which comprises a current source (ⅠN) in parallel with a resistor (RN). Here, ⅠN represents the short-circuit current flowing through the terminals, and RN stands for the input or equivalent resistance at the terminals when all independent sources are deactivated. This implies that the circuit illustrated in Figure (a) can be exchanged with the one depicted...
1.8K
Reducing Line Loss01:18

Reducing Line Loss

444
In a three-phase circuit, line loss is an indicator of energy dissipated as heat due to the resistance of transmission lines. To address this, incorporating transformers into the system—a step-up transformer at the source and a step-down transformer at the load—is a strategic solution. Two three-phase transformers are introduced to improve this.
With a step-up transformer at the source, the voltage is increased, thereby reducing the current in the transmission lines since power loss in...
444
Maximum Power Transfer01:16

Maximum Power Transfer

1.1K
Numerous practical applications within engineering disciplines, such as telecommunications, necessitate optimizing power delivery to a connected load. This pursuit, however, entails inherent internal losses, which can either equal or exceed the power supplied to the load. The Thevenin equivalent circuit is helpful in finding the maximum power a linear circuit can deliver to a load. It is assumed in this context that the load resistance can be adjusted.
By substituting the entire circuit with...
1.1K
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

1.0K
Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no...
1.0K
MOSFET01:16

MOSFET

1.6K
The Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) plays a pivotal role in modern electronics thanks to its versatility and efficiency in controlling electrical currents. This device, also known as IGFET, MISFET, and MOSFET, has three main terminals: the Source, Drain, and Gate. MOSFETs are classified into n-channel or p-channel types based on the doping characteristics of their substrate and the source or drain regions.
In an n-MOSFET, the structure includes n-type source and drain...
1.6K

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by
Same author

Nano-Antenna Coupled Infrared Detector Design.

Sensors (Basel, Switzerland)·2018
Same author

A New Approach for Dimensional Optimization of Inverters in 6T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor.

Journal of nanoscience and nanotechnology·2018
Same author

Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor.

Journal of nanoscience and nanotechnology·2018
Same author

Nanowire NMOS Logic Inverter Characterization.

Journal of nanoscience and nanotechnology·2016
Same author

Dimensional optimization of nanowire--complementary metal oxide--semiconductor inverter.

Journal of nanoscience and nanotechnology·2013
Same author

Effect of temperature on the characteristics of silicon nanowire transistor.

Journal of nanoscience and nanotechnology·2013
Same journal

Multi-Wall Carbon Nanotubes, Metal Oxide and Hydroxy-Apatite Nanoparticles Enhanced Plant Growth Promoting Capabilities of Root Endosymbionts of Cowpea (<i>Vigna unguiculata</i> (L.) Walp.).

Journal of nanoscience and nanotechnology·2021
Same journal

Sialic Acid Activated Gold Nanoparticles as Rapid Affordable Reagent for Peste Des Petits Ruminants (PPR) Virus Detection.

Journal of nanoscience and nanotechnology·2021
Same journal

Utilization of Agricultural Waste from Paddy (Rice) Fields for the Synthesis of Nanocellulose.

Journal of nanoscience and nanotechnology·2021
Same journal

Actinobacteria Mediated Nanoparticles: A Pioneering Technology for Agriculture.

Journal of nanoscience and nanotechnology·2021
Same journal

Facile Synthesis of Graphene Oxide Nanocomposites Membranes for Effective Removal of As(III) from Water.

Journal of nanoscience and nanotechnology·2021
Same journal

Capturing of Magnetic Nanoparticles in a Fluidic Channel for Magnetic Drug Targeting.

Journal of nanoscience and nanotechnology·2021
See all related articles

Related Experiment Video

Updated: Mar 28, 2026

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
09:14

Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

Published on: December 7, 2017

8.4K

Optimization of Nanowire-Resistance Load Logic Inverter.

Yasir Hashim, Othman Sidek

    Journal of Nanoscience and Nanotechnology
    |December 31, 2015
    PubMed
    Summary
    This summary is machine-generated.

    This study optimizes nanowire resistance load inverters by analyzing noise margins and inflection voltage. Results show that increasing the load resistor improves performance up to a saturation point, beyond which gains diminish.

    More Related Videos

    Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping
    14:58

    Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

    Published on: June 3, 2015

    15.5K
    In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
    09:49

    In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

    Published on: May 13, 2020

    4.4K

    Related Experiment Videos

    Last Updated: Mar 28, 2026

    Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices
    09:14

    Flow-assisted Dielectrophoresis: A Low Cost Method for the Fabrication of High Performance Solution-processable Nanowire Devices

    Published on: December 7, 2017

    8.4K
    Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping
    14:58

    Silicon Metal-oxide-semiconductor Quantum Dots for Single-electron Pumping

    Published on: June 3, 2015

    15.5K
    In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx
    09:49

    In Situ Transmission Electron Microscopy with Biasing and Fabrication of Asymmetric Crossbars Based on Mixed-Phased a-VOx

    Published on: May 13, 2020

    4.4K

    Area of Science:

    • Electrical Engineering
    • Nanotechnology
    • Semiconductor Devices

    Background:

    • Nanowire-based inverters are crucial for next-generation electronics.
    • Optimizing their performance is essential for practical applications.
    • Load resistance significantly impacts inverter characteristics.

    Purpose of the Study:

    • To perform the first optimization of nanowire resistance load inverter characteristics.
    • To identify the optimal resistance value for improved inverter performance.
    • To analyze the influence of load resistance on noise margins and inflection voltage.

    Main Methods:

    • Characterization of nanowire resistance load inverter.
    • Analysis of transfer characteristics, including noise margins and inflection voltage.
    • Systematic variation of load resistance to determine optimal parameters.

    Main Results:

    • Optimization is dependent on the load resistance value.
    • Increasing load resistance enhances noise margins up to a saturation point.
    • Further increases in load resistance beyond saturation yield negligible improvements in noise margins.

    Conclusions:

    • The study successfully demonstrates nanowire resistance load inverter optimization.
    • Load resistance is a critical parameter for achieving desired noise margins.
    • Understanding the saturation point is key for efficient inverter design.