The Design of a Single-Bit CMOS Image Sensor for Iris Recognition Applications

Area of Science:

• Electrical Engineering
• Computer Vision
• Biometrics

Background:

• Traditional iris recognition systems rely on high-resolution, multi-bit data capture, leading to slower frame rates due to analog-to-digital conversion (ADC).
• High power consumption and processing time are critical limitations in current CMOS image sensor (CIS) designs for biometric applications.

Purpose of the Study:

• To develop a single-bit CMOS image sensor (CIS) with an integrated edge detection block for efficient iris segmentation and recognition.
• To reduce the overall processing time and power consumption of CIS for iris recognition applications.

Main Methods:

• Implemented a data processing technique using an exclusive OR (XOR) logic gate to generate single-bit, edge-detected image data, bypassing multi-bit ADC conversion.
• Introduced a logarithmic counter for efficient measurement of single-bit image data suitable for iris recognition algorithms.
• Fabricated a 0.18 μm CMOS image sensor with an effective area of 2.84 mm² (174 × 144 pixels).

Main Results:

• Achieved maximum frame rates of 520 frames/s with a power consumption of 2.8 mW at a 3.3 V supply voltage.
• Demonstrated effective iris segmentation using the proposed single-bit, edge-detected image data.
• The ADC error rate was measured at 0.24 least significant bit (LSB) on an 8-bit basis at a 50 MHz sampling frequency.

Conclusions:

• The proposed single-bit CIS design offers a significant improvement in frame rate and power efficiency for iris recognition systems.
• This approach simplifies iris segmentation and recognition by processing single-bit, edge-enhanced data, reducing computational load.
• The developed sensor technology is suitable for low-power, high-speed biometric applications.