Related Experiment Video
Updated: Jan 25, 2026

The Effect of Anodization Parameters on the Aluminum Oxide Dielectric Layer of Thin-Film Transistors
Published on: May 24, 2020
Effect of Various Geometry Parameters on the Performance of Nanoplate Field Effect Transistor with Negative
Changbeom Woo1, Jang Kyu Lee1, Myounggon Kang2
1Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University, Seoul 151-747, South Korea.
Abstract:
In this paper, we investigate the impact of geometry parameters such as ferroelectric layer thickness (TFE), extension length (LExt), overlap length (Lov) on negative capacitance FET (NCFET). The NCFET is designed using HfZrO₂ (HZO) ferroelectric materials and the Nanoplate FET (NPFET) presented as a next generation device. We use the 3-D TCAD Sentaurus simulator to analyze characteristics of the NCFET. The NCFET designed considering the stable condition overcomes the Boltzmann limit (i.e., the physical limit in the S.S., which is 60 mV/decade at 300 K) through the steep subthreshold swing (S.S.) and exhibits negative Drain-induced barrier lowering (DIBL) phenomenon. When examining the characteristics of NPFET and NCFET according to LExt and Lov, the NCFET exhibits gate capacitance (Cgg) tendency opposite to that of the NPFET. The NCFET with the scaled VDD has a significant advantage over the gate delay (τd). The NCFET has better performance in environments where conventional device is more vulnerable to short channel effects (SCEs).
More Related Videos
Related Concept Videos
Field Effect Transistor
Coordination Number and Geometry
Predicting Molecular Geometry
Capacitors and Capacitance
When the conductors are two identical parallel plates, it is called a parallel plate capacitor. When battery terminals are...
Equivalent Capacitance
The following strategies are adopted to calculate...
Equivalent Capacitance

