FPGA-Based Autonomous GPS-Disciplined Oscillatorsfor Wireless Sensor Network Nodes.

Area of Science:

• Electrical Engineering
• Computer Engineering
• Signal Processing

Background:

• Distributed wireless sensor arrays demand precise timing references.
• Existing GPS-disciplined oscillators face hardware design limitations impacting performance.

Purpose of the Study:

• To present a novel hardware implementation of a GPS-disciplined oscillator.
• To incorporate an automatic adaptive drift correction algorithm for enhanced accuracy.
• To demonstrate the advantages of the proposed low-cost, high-speed FPGA-based design.

Main Methods:

• Hardware implementation of a GPS-disciplined oscillator on a Field-Programmable Gate Array (FPGA).
• Development and integration of an automatic adaptive drift correction algorithm.
• Real-time testing in diverse indoor and outdoor environments, comparing against state-of-the-art designs.

Main Results:

• The proposed GPS-disciplined oscillator achieves low cost and high performance.
• Demonstrated 1PPS signal drift below 80 ns in indoor tests after 24 hours without GPS.
• Achieved 1PPS signal drift below 356 ns in outdoor tests after 24 hours without GPS.

Conclusions:

• The FPGA-based GPS-disciplined oscillator with adaptive drift correction offers a viable solution for accurate timing in wireless sensor networks.
• The design overcomes performance limitations of traditional GPS-disciplined oscillators.
• The device proves effective in real-world applications across different environments.