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FPGA-Based Autonomous GPS-Disciplined Oscillatorsfor Wireless Sensor Network Nodes
Toan Quang The Bui1, Arul Elango1, René Jr Landry1
1École de Technologie Supérieure, Université du Quebéc, Montréal, QC H3C 1K3, Canada.
Abstract:
Numerous devices in distributed wireless sensor arrays require a high-accuracy timing reference. Although the GPS-disciplined oscillators have been developed for decades, the hardware design still has performance limitations. In this context, we present the hardware implementation for a GPS-disciplined oscillator with an automatic adaptive drift correction algorithm, which is implemented in a low-cost, high-speed field-programmable gate array (FPGA) device. The system design and the hardware implementation are presented to demonstrate the advantages of the proposed oscillator. To verify this oscillator in real-time applications, we tested the device in multiple environments and compared it to state-of-the-art designs. The experimental results showed that our proposed device has a low cost and high performance. This device can achieve less than 80 ns and 356 ns in 1PPS signal drift in the indoor environment test and the outdoor environment test, respectively, after 24 h of working without a GPS signal.
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