Search research articles

ABOUT JoVE

Overview Leadership Blog JoVE Help Center

AUTHORS

Publishing Process Editorial Board Scope & Policies Peer Review FAQ Submit

LIBRARIANS

Testimonials Subscriptions Access Resources Library Advisory Board FAQ

RESEARCH

JoVE Journal Methods Collections JoVE Encyclopedia of Experiments Archive

EDUCATION

JoVE Core JoVE Business JoVE Science Education JoVE Lab Manual Faculty Resource Center Faculty Site

Terms & Conditions of Use

Related Concept Videos

You might also read

Related Articles

Articles linked to this work by shared authors, journal, and citation graph.

Sort by

Same author

DustNet: A Wireless Network of Ultrasonic Neural Implants.

IEEE transactions on biomedical circuits and systems·2026

Same author

A curved-beam piezoelectric MEMS resonator featuring multiple temperature plateaus with enhanced stability.

Microsystems & nanoengineering·2026

Same author

Electrical stimulation precisely reproduces naturalistic spiking activity in complete and intermixed neural populations in the primate retina.

bioRxiv : the preprint server for biology·2026

Same author

Single-cell impedance sensing on integrated circuit chip for fast tumor diagnosis.

Microsystems & nanoengineering·2026

Same author

A supersandwich fluorescent aptasensor leveraging the synergy of mini-nanotetrahedron, high-affinity split aptamer and rolling circle amplification for kanamycin analysis in milk.

Food chemistry·2026

Same author

A cochlea bio-inspired tunable piezoelectric cantilever array MEMS microphone: comprehensive study.

Microsystems & nanoengineering·2026

Same journal

NeuroFlare: An mm<sup>3</sup>-Scale Wireless Neural Interface Device with Simultaneous Neural Recording and Optical Stimulation.

IEEE journal of solid-state circuits·2026

Same journal

A Sub-mm<sup>3</sup> Wireless Neural Stimulator IC for Visual Cortical Prosthesis With Optical Power Harvesting and 7.5-kb/s Data Telemetry.

IEEE journal of solid-state circuits·2025

Same journal

A Scalable 1024-Channel Ultra-Low-Power Spike Sorting Chip with Event-Driven Detection and Spatial Clustering.

IEEE journal of solid-state circuits·2025

Same journal

Monolithic Electronic-Biophotonic System-on-Chip for Label-Free Real-Time Molecular Sensing.

IEEE journal of solid-state circuits·2025

Same journal

A Wireless, Multicolor Fluorescence Image Sensor Implant for Real-Time Monitoring in Cancer Therapy.

IEEE journal of solid-state circuits·2025

Same journal

A Nonuniform Sampling Lifetime Estimation Technique for Luminescent Oxygen Measurements for Biomedical Applications.

IEEE journal of solid-state circuits·2025

See all related articles

Search research articles

Related Experiment Video

Updated: Jun 10, 2025

Investigating the Function of Deep Cortical and Subcortical Structures Using Stereotactic Electroencephalography: Lessons from the Anterior Cingulate Cortex

Investigating the Function of Deep Cortical and Subcortical Structures Using Stereotactic Electroencephalography: Lessons from the Anterior Cingulate Cortex

Published on: April 15, 2015

A 1024-Channel 268 nW/pixel 36×36 μm²/channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer

MoonHyung Jang¹, Maddy Hays², Wei-Han Yu³

¹Department of Electrical Engineering, Stanford University, CA 94305 USA.

IEEE Journal of Solid-State Circuits

|October 11, 2024

Summary

This summary is machine-generated.

This study introduces a novel data-compressive integrated circuit for neural recording, significantly reducing data rates for brain-computer interfaces. It enables high-resolution signal capture with unprecedented energy efficiency.

Keywords:

Brain-computer interface (BCI)brain-machine interface (BMI)compression multi-electrode array (MEA)neural interface neural recording pulse-position modulation (PPM)single-cell resolution

More Related Videos

Recording Human Electrocorticographic ECoG Signals for Neuroscientific Research and Real-time Functional Cortical Mapping

Recording Human Electrocorticographic ECoG Signals for Neuroscientific Research and Real-time Functional Cortical Mapping

Published on: June 26, 2012

Author Spotlight: Advancing Large-Scale Neural Dynamics Through HD-MEA Technology

Author Spotlight: Advancing Large-Scale Neural Dynamics Through HD-MEA Technology

Published on: March 8, 2024

Related Experiment Videos

Last Updated: Jun 10, 2025

Investigating the Function of Deep Cortical and Subcortical Structures Using Stereotactic Electroencephalography: Lessons from the Anterior Cingulate Cortex

Investigating the Function of Deep Cortical and Subcortical Structures Using Stereotactic Electroencephalography: Lessons from the Anterior Cingulate Cortex

Published on: April 15, 2015

Recording Human Electrocorticographic ECoG Signals for Neuroscientific Research and Real-time Functional Cortical Mapping

Recording Human Electrocorticographic ECoG Signals for Neuroscientific Research and Real-time Functional Cortical Mapping

Published on: June 26, 2012

Author Spotlight: Advancing Large-Scale Neural Dynamics Through HD-MEA Technology

Author Spotlight: Advancing Large-Scale Neural Dynamics Through HD-MEA Technology

Published on: March 8, 2024

Area of Science:

Neuroscience
Electrical Engineering
Biomedical Engineering

Background:

High-bandwidth neural recording is crucial for advanced brain-computer interfaces (BCIs).
Existing systems face challenges with data deluge and high power consumption.
Need for efficient, high-density neural recording solutions.

Purpose of the Study:

To present a data-compressive neural recording integrated circuit (IC) for single-cell resolution BCIs.
To demonstrate significant data rate reduction and high energy efficiency.
To enable compact and low-power neural recording systems.

Main Methods:

Implemented wired-OR lossy compression during analog-to-digital conversion.
Utilized pulse position modulation-based active digital pixels with global single-slope ADC.
Fabricated a 1024-channel IC in 28-nm CMOS technology with 36 μm pixel pitch.

Main Results:

Achieved an average data rate reduction of 146× by discarding baseline samples.
Demonstrated low input-referred noise (7.4 μVrms) and wide bandwidth (300 Hz–5 kHz).
Attained minimal power consumption (268 nW) and the smallest area per channel (36 × 36 μm²).

Conclusions:

The developed IC offers a breakthrough in data compression for neural recording.
It represents the most energy-efficient and compact neural recording IC to date.
This technology paves the way for next-generation, high-performance BCIs.