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在碳纳米管阵列晶体管的网关堆中的接口状态
Yifan Liu1, Sujuan Ding2, Weili Li3
1Key Laboratory for the Physics and Chemistry of Nanodevices and Center for Carbon-based Electronics, School of Electronics, Peking University, Beijing 100871, China.
ACS nano
|July 8, 2024
概括
研究人员优化了对齐碳纳米管场效应晶体管 (A-CNT FETs) 中的接口状态. 这项研究实现了创纪录的低接口状态密度,提高了未来节能电子设备的设备性能.
科学领域:
- 材料科学 材料科学 材料科学
- 纳米技术 纳米技术
- 半导体物理 半导体物理
背景情况:
- 优化金属氧化物半导体 (MOS) 接口状态对于高性能场效晶体管 (FET) 至关重要.
- 排列碳纳米管 (A-CNT) FET显示出作为晶体管的节能替代品的希望,但它们的接口状态特征尚未得到充分探索.
研究的目的:
- 在基于A-CNT数组的MOS结构中调查和优化接口状态.
- 在A-CNT FET中建立高质量的门堆的基础.
主要方法:
- 使用精致布局的A-CNT阵列制造MOS电容器.
- 精确测量电容电压 (C-V) 和导电电压 (G-V) 数据.
- 对门静电学和接口状态的物理起源进行系统分析.
主要成果:
- 通过有针对性的改进门介电增长,实现了创纪录的低接口状态密度 (Dit) 6.1 × 1011 cm-2 eV-1.
- 证明了2.42mS/μm的记录传导率 (gm) 和105的开关比率.
- 确定了进一步降低Dit到1 × 1011cm-2 eV-1以下的必要性,以获得最佳的能源效率.
结论:
- 目标介电工程显著抑制了A-CNT MOS设备中的接口状态.
- 实现的低Dit代表了碳纳米管基晶体管的重大进步.
- 进一步减少接口状态对于实现A-CNT FETs的全部能源效率潜力至关重要.
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