Negative-Capacitance Fin Field-Effect Transistor Beyond the 7-nm Node.

Area of Science:

• Semiconductor device physics
• Materials science

Background:

• Negative-capacitance field-effect transistors (NC-FinFETs) offer potential for overcoming Boltzmann tyranny.
• Extending NC-FinFET designs beyond the 7-nm node is crucial for next-generation integrated circuits.

Purpose of the Study:

• To investigate and extend the design of negative-capacitance FinFETs (NC-FinFETs) beyond the 7-nm technology node.
• To propose a novel NC-FinFET structure utilizing double ferroelectric hafnium zircon dioxide layers.
• To evaluate the performance of the proposed NC-FinFET in terms of voltage gain, subthreshold swing (SS), and threshold voltage downscaling.

Main Methods:

• Utilized Landau-Khalatnikov equation for modeling negative capacitance effects.
• Employed 3D technology computer-aided design (TCAD) simulations for physical device modeling.
• Simulated static noise margin (SNM) of static random access memory (SRAM) incorporating the new NC-FinFET.

Main Results:

• The proposed double ferroelectric hafnium zircon dioxide NC-FinFET exhibits significant voltage gains in the sub-threshold region.
• Achieved effective reduction in subthreshold swing (SS), maintaining a uniform SS below 60 mV/dec over a wide range.
• Demonstrated threshold voltage downscaling without compromising off-current levels.
• Simulated SRAM using the new NC-FinFET showed improved performance with enhanced SS and threshold voltage.

Conclusions:

• The novel double ferroelectric NC-FinFET design effectively reduces SS and allows for threshold voltage scaling, crucial for low-power electronics.
• The device shows promise for next-generation integrated circuits, particularly in static random access memory applications.
• This work extends the applicability of NC-FinFETs to beyond the 7-nm technology node, paving the way for further downscaling.