A RRAM-Based True Random Number Generator with 2T1R Architecture for Hardware Security Applications

Resistance random access memory (RRAM) based true random number generator (TRNG) has great potential to be applied to hardware security owing to its intrinsic switching variability. Especially the high resistance state (HRS) variation is usually taken as the entropy source of RRAM-based TRNG. However, the small HRS variation of RRAM may be introduced owing to fabrication process fluctuations, which may lead to error bits and be vulnerable to noise interference. In this work, we propose an RRAM-based TRNG with a 2T1R architecture scheme, which can effectively distinguish the resistance values of HRS with an accuracy of 1.5 kΩ. As a result, the error bits can be corrected to a certain extent while the noise is suppressed. Finally, a 2T1R RRAM-based TRNG macro is simulated and verified using the 28 nm CMOS process, which suggests its potential for hardware security applications.