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Related Concept Videos

Design Example: Capacitance Multiplier Circuit01:20

Design Example: Capacitance Multiplier Circuit

In integrated circuit technology, a capacitance multiplier is often utilized to produce a larger capacitance value when a small physical capacitance falls short. This is achieved by a circuit that multiplies capacitance values by a factor of up to 1000, such that a 10-pF capacitor can replicate the performance of a 100-nF capacitor.
The circuit illustrated in Figure 1 below incorporates two op-amps, with the first operating as a voltage follower and the second acting as an inverting amplifier.
MOS Capacitor01:25

MOS Capacitor

A Metal-Oxide-Semiconductor (MOS) capacitor is a fundamental structure used extensively in semiconductor device technology, particularly in the fabrication of integrated circuits and MOSFETs (metal-oxide-semiconductor field-effect transistors). The MOS capacitor consists of three layers: a metal gate, a dielectric oxide, and a semiconductor substrate.
The metal gate is typically made from highly conductive materials such as aluminum or polysilicon. Beneath the metal gate lies a thin layer of...
MOSFET: Enhancement Mode01:22

MOSFET: Enhancement Mode

Enhancement-mode MOSFETs are pivotal components in electronics, distinguished by their capacity to act as highly efficient switches. They are part of the larger family of metal-oxide Semiconductor Field-Effect Transistors (MOSFETs). They are available in two types: p-channel and n-channel, each tailored to specific polarity operations.
In their basic form, enhancement-mode MOSFETs are typically non-conductive when the gate-source voltage (Vgs) is zero. This default 'off' state means no current...

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Design and Simulation Analysis of a 3TnC MLC FeRAM Using a Nondestructive Readout and Offset-Canceled Sense Amplifier

Bo Peng1, Donglin Zhang2, Zhongqiang Wang1

  • 1Key Laboratory of UV Light-Emitting Materials and Technology of Ministry of Education, Northeast Normal University, Changchun 130024, China.

Micromachines
|August 26, 2023
PubMed
Summary

Hafnium-zirconium oxide (Hf0.5Zr0.5O2)-based multi-level cell ferroelectric random-access memory (FeRAM) offers high-density storage. Circuit optimizations, including a nondestructive readout and offset-canceled sense amplifier, improve operation margin and reduce offset voltage for reliable multi-level state reading.

Keywords:
FeRAMnondestructive readoutoffset-canceled sense amplifier

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Area of Science:

  • Materials Science
  • Electrical Engineering
  • Computer Engineering

Background:

  • Hafnium-zirconium oxide (Hf0.5Zr0.5O2)-based multi-level cell (MLC) ferroelectric random-access memory (FeRAM) shows promise for high-density storage.
  • Existing MLC FeRAM technologies face challenges with small operation margins and significant input offset voltages.

Purpose of the Study:

  • To address limitations in MLC FeRAM, this study focuses on circuit design and optimization.
  • To propose and simulate an efficient circuit configuration for Hf0.5Zr0.5O2-based 3T1C MLC FeRAM.

Main Methods:

  • A SPICE model was used to simulate eight distinguishable polarization states in a Hf0.5Zr0.5O2 memory device.
  • A nondestructive readout approach was implemented to enhance the reading margin between adjacent storage levels.
  • A capacitorless offset-canceled sense amplifier (SA) was designed to minimize offset voltage.

Main Results:

  • The proposed 3T1C MLC FeRAM macro circuit achieves a high area efficiency of 12F2 per bit.
  • The nondestructive readout method expanded the reading margin to 450 mV.
  • The offset-canceled SA successfully reduced the offset voltage to 20 mV, improving readout reliability.
  • A 4 Mb MLC FeRAM macro was simulated and verified using a 130 nm CMOS process.

Conclusions:

  • The developed circuit design provides a foundation for fabricating practical Hf0.5Zr0.5O2-based MLC FeRAM chips.
  • This work highlights the potential of Hf0.5Zr0.5O2-based MLC FeRAM for future high-density storage applications.