System-level modeling with temperature compensation for a CMOS-MEMS monolithic calorimetric flow sensing SoC

Area of Science:

• Microelectromechanical Systems (MEMS)
• Integrated Circuit Design
• Thermal Engineering

Background:

• Calorimetric flow sensors are crucial for various applications but are susceptible to temperature drift.
• Existing solutions often lack on-chip integration and efficient compensation mechanisms.
• Co-design of MEMS sensors and CMOS interface circuits is essential for system-level optimization.

Purpose of the Study:

• To develop a system-level model for a monolithic CMOS-MEMS calorimetric flow sensing System-on-Chip (SoC).
• To implement an on-chip temperature compensation technique to mitigate low-temperature drift.
• To facilitate the co-design of MEMS sensors and CMOS interface circuits using an Electronic Design Automation (EDA) platform.

Main Methods:

• A system-level model integrating mechanical, thermal, and electrical domains was developed.
• An on-chip temperature compensation strategy utilizing a variable temperature difference heating circuit was implemented.
• Linear programming was employed to determine optimal compensation resistor (Rc) values and temperature coefficients of resistance (TCR).

Main Results:

• The optimal compensation resistor (Rc) was found to be 748.21 Ω with a TCR of 3.037 × 10⁻³ °C⁻¹ at 25 °C.
• Experimental validation showed a reduction in temperature drift from ±8.9% to ±1.6% over a 0-50 °C ambient temperature range.
• The compensated SoC maintained accuracy across a flow range of 0-10 m/s.

Conclusions:

• The developed on-chip temperature compensation technique effectively reduces drift in CMOS-MEMS flow sensing SoCs.
• This compensated SoC offers a promising solution for low-cost, high-accuracy sensing in applications such as respiratory monitoring and smart buildings.
• The system-level modeling approach facilitates efficient co-design for integrated microsystems.