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Updated: May 10, 2025

Planar and Three-Dimensional Printing of Conductive Inks
Published on: December 9, 2011
Miniaturized Micrometer-Level Copper Wiring and Electrodes Based on Reverse-Offset Printing for Flexible Circuits.
Kim Eiroma1, Asko Sneck1, Olli Halonen1
1VTT Technical Research Centre of Finland, Ltd., Tietotie 3, FI-02150 Espoo, Finland.
High-resolution reverse-offset printing (ROP) enables miniaturized printed electronics with reduced material use. Two ROP methods for copper patterning show excellent uniformity and potential for robust flexible integrated circuits.
Area of Science:
- Materials Science and Engineering
- Electrical Engineering
- Nanotechnology
Background:
- Miniaturization of printed electronics demands advanced patterning techniques with reduced material consumption.
- Conventional printing methods often lack the resolution and efficiency required for next-generation electronic devices.
- Reverse-offset printing (ROP) offers a promising alternative for high-resolution patterning of conductive materials.
Purpose of the Study:
- To develop and evaluate high-resolution ROP processes for patterning metal conductors in printed electronics.
- To compare the performance of direct nanoparticle (NP) printing and vacuum-deposited metal lift-off (LO) using ROP.
- To demonstrate the scalability and robustness of ROP for fabricating flexible integrated circuits (ICs).
Main Methods:
- Investigated ROP of copper (Cu) nanoparticle (NP) ink followed by intense pulsed light (IPL) sintering.
- Examined ROP patterning of vacuum-deposited Cu films using a polymer resist ink and lift-off (LO) process.
- Assessed large-area uniformity, sheet resistance, resistivity, and line-space (L/S) resolution for both methods.
Main Results:
- Achieved sheet resistances of 0.56 ± 0.03 Ω/□ (113 nm Cu NP) and 1.23 ± 0.05 Ω/□ (40 nm Cu LO).
- Demonstrated <5% thickness variation over a 10 cm × 10 cm area for both ROP processes.
- Obtained 2 μm L/S resolution with low line edge roughness (LER) for ROP LO Cu, while ROP NP Cu showed L/S resolution of 2–4 μm limited by higher LER.
Conclusions:
- ROP is a scalable and sustainable patterning method for flexible ICs, offering reduced material usage.
- Both ROP NP and ROP LO processes provide robust electrical interconnections for flexible chip assembly.
- ROP holds significant potential for applications in wearable electronics, large-scale sensing, and environmental monitoring.
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